![]() This situation persists regardless of the clock rate or the input frequency. Using high-speed pipelined ADCs, especially newer generations on lower voltage process technologies, means you are dealing with artifacts that extend further out in frequency, for example to 10 GHz on Linear Technology ADCs using 1.8V processes. Follow these rules for PCB layout, and you should stay out of trouble, at least with high-speed ADCs. This is meant for those looking for a checklist. They are the subject of a much longer document for those with longer attention spans, or time. This will likely generate a few phone calls because the reasons for the advice are not given. This goes against our general philosophy of writing to minimize the number of phone calls. The intention here is to create the most concise layout guide ever. A Short Course in PCB Layout for High-Speed ADCs
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